1. Field of the Invention
The present invention relates to an output data selection technique in which an output is selected from a plurality of outputs of table search circuits in a communication apparatus such as a network router and the like, wherein each of the table search circuits selects data from a data table, which data includes an entry matching a search key, the search key being a bit sequence of a part of input data and the data table including a plurality of data which is stored in a data storage in the table search circuit. The output data selection technique is used in a table search process in a router or a switch for example.
2. Description of the Related Art
FIG. 1 shows a configuration example of a data selection apparatus using CAMs (Content Addressable Memories) according to a conventional technique. The data selection apparatus shown in FIG. 1 includes a plurality of CAMs and an output control circuit which controls output of the CAMS. Each CAM performs a search process in parallel on a search key which is a part of input data. Each CAM which succeeds in the search sends a CAM search success signal to the output control circuit. The output control circuit selects a CAM of the highest priority from CAMs which succeed in the search so that a selected CAM outputs data.
FIG. 2 shows a timing chart representing the operation of the data output selection process according to a conventional technology. (1) shows the CAM search success signal and (2) shows the time required for the data output selection process.
According to the above-mentioned configuration, if the number of CAMs is large, the time t_pe becomes very long due to the fact that the number of logic stages in the output control circuit becomes large.
That is, there is a problem in that when the number of CAMs which should be controlled by the output control circuit becomes large, process delay in the output control circuit becomes large. Consequently, process speed of the data selection apparatus is lowered.